Detector system



April 12, 1949. c. H. HOEPPNER DETECTOR SYSTEM Filed Cot. 50, 1946gjwumwto'o CONRAD H. HOEPPNER OUTPUT SI GNAL Patented Apr. 12, 1949UNITED STATES PATENT OFFICE (Granted under the act of March 3, 1883, asamended April 30, 1928; 370 0. G. 757) 4 Claims.

This invention relates to detector systems and in particular to improvedpeak riding detectors for reproducing accurately peak amplitudevariations of a recurrent pulse type signal.

In numerous applications of radio receiving and integrating equipment itis desirable to have a detector device capable of accurately producing asignal in dependency on the amplitude variations of a recurrent signal.In typical apparatus of this class provided by the prior art as typifiedby a diode unilateral impedance device operating in conjunction with aresistance-capacitance time constant filter circuit, the time constantof the filter circuit must be sufliciently short to permit conduction bythe diode at least on the crest of succedent pulses which may be subjectto considerable amplitude variation. This operation, of necessity,requires considerable decay in voltage across the filter circuit in theinterval between succedent pulses. Frequently such variation betweenpulses is undesirable.

It is therefore an object of the present invention to provide improvedsignal detector apparatus.

Another object of the present invention is to provide signal detectorapparatus responsive to rapid variations in amplitude of succedentpulses and capable of maintaining a substantially constant level outputsignal in the time interval between succedent pulses.

Another object of the present invention is to provide detector apparatusresponsive to an amplitude modulated high frequency signal to produce anoutput signal proportional in instantaneous amplitude to peak amplitudeof the modulation of the high frequencysignal with minimum variation inthe output signal between successive peaks of the carrier signal.

Other and further objects and features of the present invention willbecome apparent upon a careful consideration of the accompanyingdescription and drawings.

Figure l is a schematic diagram of a basic embodiment of the presentinvention.

Figure 2 is a more elaborate form of the basic embodiment designed forgreater flexibility of operation.

Figures 3 and 4 show, respectively, waveforms taken to illustrate morefully the operation of the circuits of Figures 1 and 2.

In accordance with the fundamental concepts of the present invention asignal integrator or detector is provided in which a capacitive typeenergy storage device is charged and discharged to voltage levelsproportional to the amplitudes of succedent input signals. vice ischarged to a voltage to that of a first input signal lower typeelectrical circuit possessing low output impedance. Connected in shuntwith the capacitive storage device is the anode circuit of a biasedelectron tube. In the time interval between input signals this shuntelectron tube is maintained in a substantially non-conductive condition.Input signals, however, do raise the shunt connected tube to a conditionof anode circuit conductivity to permit current flow therethrough. Thisflow of current tends to discharge the capacitive storage device andunless supplied through the cathode follower type circuit the voltageacross the capacitive storage device will fall quite rapidly until thepotential thereacross is proportional to the input signal permittingconduction by the cathode follower tube.

With particular reference to Fig. 1 a detector circuit is provided whichis designed to receive at input terminal ill a multiple pulse typesignal such as that shown in waveform A of Fig. 3 in which the pulsesare of varying amplitudes. The peak; sustained signal waveform B of Fig.3 is obtained from output terminal ll across capacitive type energystorage device I 2. In operation capacitive type storage device I?! ischarged to a peak amplitude substantially that of the peak of the inputpulses by the low output impedance cathode follower tube l3. Capacitancel2, thus charged, will remain without appreciable loss of voltagethereacross even after the conclusion of the positive pulse provided theshunt electron tube M is non-conductive. To permit the circuits torespond to a second pulse having a lesser amplitude than a first pulse,a capacitance discharge path operative from the input pulses isprovided. This discharge path consists of the anode circuit of electrontube M which is placed in shunt with capacitance l2. Electron tube I4 ismaintained in a normally non-conductive condition. by virtue of anegative bias supplied to the grid l5 thereof from source l6. Uponapplication of the positive input pulses of waveform A to the grid oftube l3 similar pulses are applied by means of capacitance I! to thegrid l5 of tube M. Tube i4 is thereby rendered conductive to provide adischarge path for capacitance l2. Thus. tube M is rendered conductiveby the low amplitude second pulse to produce a partial dis charge ofcapacitance l2 reducing the potential The capacitive delevelproportional at the cathode of tube l3 until it is substantiallyproportional to that of the signal applied to the grid of tube l 3. Whenthe voltage at the cathode by a cathode folof tube i3 is reduced to thispoint further voltage reduction is prevented by cathode follower (lowoutput impedance) action of tube iii.

In a similar manner the existence of another pulse signal at terminalill of amplitude greater than that immediately preceding will produceanode circuit conductivity by tube M which will be more thancounter-balanced by the cathode follower action of tube it so thatcapacitance l2 will receive additional charge.

The simple circuit of Fig. l is ideally suited for pulse type operation,however, when the input pulses have sloping leading and trailing edgesoperation may sometimes be enhanced by the more elaborate circuit ofFig. 2. For pulses having sloping leading trailing edges such as thoseshown in waveform A of Figure l, it is likely that the capacitancedischarge tube may conduct appreciably in the interval of timeimmediately preceding and immediately following the attainment of crestpulse amplitude because of the bias conditions.

Where such action occurs it is apparent that slight discontinuities willbe present in the output signal immediately preceding and immediatelyfollowing each input pulse whether that pulse is equal to the precedingpulse or not. The discontinuity immediately preceding the conductivityperiod of the cathode follower tube is not of serious consequencebecause it will generally be of short duration lasting only until thecathode follower tube is brought to conduction on the crest of the inputpulse signal. On the other hand, conduction by the discharge tubefollowing the cessation of conduction by the cathode follower tube willproduce a drop in the voltage across the capacitive storage device whichcan not be overcome.

Included in the expanded circuit of Fig. 2 is an additional cathodefollower type tube and delay apparatus not present in Fig. 1. With thiscircuit the capacitance discharge tube it which is biased from source25A, receives input pulse signals from terminal l9 through a delay linewhile a first cathode follower charging tube 2! receives undelayed pulsesignals via the capacity compensated voltage divider 22 and 23. Thedelay time of circuit 28 is chosen so that cathode follower chargingtube 2! will be brought to conduction by the crest of the input pulsesfor a short period of time before the discharge tube 18 isrenderedconductive. By this means discharge tube 18 cannot produce a reductionin voltage across the capacitive storage device 2 2' on the slopingleading edge of the input signals.

A second cathode follower charging tube 25 is provided with the inputpulse signal via a second delay line 25. Delay lin 25 is adjusted sothat the crest of the input pulse signals will be applied to tube 25during the sloping trailing edge of each of the input pulses similarlypreventing discharge of capacitance 2 3 during this second interval oftime. The smooth integrated output as indicated by waveform D of Fig. 4is produced at output terminal 21.

From the foregoing discussion it is apparent that considerablemodification of the features of the present invention is possible andwhile the devices herein described and the forms of apparatus for theoperation thereof constitute preferred embodiments of the presentinvention it is to be understood that the invention is not limitedtothese precise. devicesand forms of apparatus and that changes may bemade therein without Y departing from the scope of the invention whichis defined in the appended claims.

The invention described herein may be manufactured and used by or forthe Government of the United States of America for governmental purposeswithout the payment of any royalties thereon or therefor.

What is claimed is:

1. An integrator device responsive to peak amplitudes of input pulsetype signals having sloping leading and trailing edges, comprising;first and second electron tubes, a common load circuit for the first andsecond tubes comprising a capacitive energy storage device receptive oflow impedance charging from the first and second tubes responsive tosignals applied thereto, a third electron tube placed in shunt with thecapacitive storage device responsive to applied signals to effect animpedance discharge path therefor operative to produce partial dischargethereof upon receipt of low amplitude input signals following highamplitude input signals, first delay means delaying input pulse typesignals applied to the third electron tube by an intermediate amount oftime to prevent conduction thereby during the sloping leading edges ofthe signals, and second delay means delaying application of input pulsetype signals to the second electron tube by an additional amountrendering the second electron tube conductive during sloping trailingedges of pulse signals applied to the third electron tube.

2. A demodulator for pulse signals comprising, a storage capacitor,first space discharge means serially connected to said capacitor andoperative in response to an input pulse signal applied thereto to storea charge on said capacitor proportional to the peak amplitude of theinput signal, second space discharge means connected in shunt with saidcapacitor and serving to provide a normally high resistance dischargepath therefor, and means operative to lower the resistance of said lastnamed discharge means in response to and for the duration of said inputpulse signal.

3. A demodulator for pulse signals comprising, first space dischargemeans comprising anode, grid and cathode electrodes, a storage capacitorconnected in the cathode circuit of said discharge means whereby saiddischarge means is operative in response to an input pulse signalapplied to the grid circuit thereof to store a charge on said capacitorproportional to the peak amplitude of the input signal, second spacedischarge means connected in shunt with said capacitor and serving toprovide a normally high resistance discharge path therefor, and meansoperative to lower the resistance of said last named discharge means inresponse to and for the duration of said input pulse signal.

4. In a pulse signal demodulator system for producing an output voltagelevel proportional to the peak amplitudes of input pulse type signals ofvarying amplitudes, a first electron discharge device having a lowoutput impedance, a capacitive energy storage device connected to theoutput of said first electron discharge device whereby said device isresponsive to the. amplitude of the input pulse signal applied theretoto produce a low impedance charging of said capacitive energy storagedevice at a level proportional to the amplitude of the said input pulsesignal, a second electron discharge device having a cathode, a controlelectrode and an anode, said second electron discharge device connectedin shunt circuit ar- 6 REFERENCES CITED The following references are ofrecord in the file of this patent:

UNITED STATES PATENTS Number Name Date White Aug. 20, 1940 Crosby Jan.28, 1941 Blumlein Dec. 16, 1941 Pierce Oct. 20, 1942

